The PowerPC 600 series has a few types of control transfer instructions. Let's look at direct branches first. b target ; branch to target bl target ; branch to target and link The direct branch instructions perform an unconditional relative branch to the target. Instruction Forms []. All PowerPC instructions are four bytes long. Whenever the processor calculates the destination address of a branch, the two low-order bits are ignored, so the actual two low-order bits are always 0 in the destination address (i.e., every instruction is word-aligned). Bctr Powerpc Instruction The "true" PPC instructions are explained much like ARM instructions in ARMv7-A/R ARM, bctr, bcctr 20,0, Branch unconditionally (bcctr without LR update). PowerPC User Instruction Set Architecture Book I Version 2.01 September 2003 Manager: 2.4.1 Branch Instructions..20 2.4.2 System Call Instruction vi PowerPC User Instruction Set Architecture. Version 2.01 gcc PowerPC Assembly Quick Reference ("Cheat Sheet") "Branch and Link". Saves return address in link register, then jumps to func. Used to call subroutines. Be sure to save the link register to the stack first! There's an excellent table of PowerPC instructions here. A developer's guide to the POWER architecture POWER programming by the book PowerPC Book I instructions and registers, while offering system-level extensions in the area of memory management, the branch instruction moves the program counter to the address in LR. Also, the conditional separate execution units, allowing instructions to execute in parallel. PowerPC 750 has six independent execution units, two for integer instructions, and one each for floating-point instructions, branch instructions, load/store instructions, and system register instructions. Having separate GPRs and FPRs allows instruction for the branch and marking the instruction as a guess. If the guess was right then the processor just keeps executing; however, if the guess was wrong then the proces